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Reference Pages: Apple II Hardware [TransWarp GS GAL Versions ]

Manufacturer: Applied Engineering
TransWarp GS GAL Set Closeup View (93K)
 
TransWarp GS with Rev A GAL Set installed. In system.

(Ok, so there is a 3B on there..)

Yes, you can use REV A GALs in your TransWarp GS. GAL Revisions were primarily to deal with bugs, or anomolies in the original '816 design. As things went faster certain instructions or in most cases, sequences of instructions would break down at faster speeds. The reason for the '2 MHz' over ability of the Zip GSX was because the Gate Array took into consideration these flaws and delt with them on a realtime basis, slowing down or waiting for instruction completion before continuing. The Original '816 was never pushed past 10 MHz as an official number. You could get Engineering Samples of newer lots that each had been hand tested for performance spec and included with each was a sheet with the test results.

Some of these chips were good to as high as 12, 13 MHz. Because the Zip GSX handled things the way it did, they could get alteast a MHz or 2 over the rating, but not without a price. One of the things required to get more from the chip was increase the voltage supplied. The technology the Apple IIgs is based on runs at primarily +5VDC. If you put much higher octane fuel in your car, your engine may run really great. In the long run however, more stress is put on it and it may not last as long or wear things out faster. The same thing applies here except that there are no moving parts, things don't wear out as such but do become less and less reliable and at a point in time will cease to be useful. Most people that have modified ZipGSX boards with voltage increases are now using them back at slower speeds or even not at all due to increased unreliabilty. The ZipGSX has provisions on the card for isolating power to the CPU and adding a regulator to the board with the addition of some Ohms Law principals the desired voltage can be obtained and the CPU speed boosted. The TransWarp GS was not setup for this. As the engineers experimented and these higher speed yielding CPUs became more available, since a voltage increase was not mandatory, things were changed within the logic for the TransWarp GS to deal with faster clock speeds. The GAL Revisions also delt with some other compatibility issues.

The following is hearsay from me based on my experiences. I have never had a problem with compatibility between a TransWarp GS and say, the RAMFast SCSI card. What I classify as a compatibility issue is any condition that results in data corruption that can be DUPLICATED at ANY TIME, ON DEMAND. Anything else is just that, anything else. The Nature of the Apple II design is that things are being done in ways not normal. Face it, the Apple II is a hack of the earliest kind. There is not a CPU clock in the Apple ][, it is generated by logic. This and of itself is basis for the entire Apple II family to maintain compatibility from day one. Faster CPU chips were not available in any real kind of supply, as a marketer, AE had to mass market what was available in mass quantity. So, while catering to those hardware nuts and AE's own internal quest to incease speed and overall performance of it's products, the GAL updates could not really be 'marketed' as speed improvements without bogging down their technical support dept with more curiosity seekers, the perverbial can of worms, if you will.

In a nutshell, what I am getting at is that GAL revisions were things such as watchdog logic, conditional and check points for instruction and operations. Certain functions are more taxing than others and at the edge of the threshold, these limitations show through. With extensive testing these limitations were brought to the surface and delt with. Zip Technology had a much greater understanding of the core of the '816 than AE did in the beginning. In a game of cat and mouse, each would try to out do each other. Since the TransWarp GS is designed with descrete components it can be upgraded, as was done. The Zip GSX on the other hand was designed with a stamped VLSI that contained the gernal logic and custom gate array. No upgrades were possible without changing of the die. Using a complete set of Rev A GALs in your TWGS, along with the Sanyo '816 design allows for un metered flow of instructions through your TWGS. Speeds of 16+ MHz are obtainable in this configuration. The Cache RAM module needs to be upraded for this to happen as well. The following pages contain this information.

 

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